ADT7476A
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59
Table 73. XNOR TREE TEST ENABLE (Note 1)
Register Address
R/W
Description
Power-On Default
0x6F
[0]
[7:1]
R/W
XEN
Reserved
XNOR tree test enable register.
If the XEN bit is set to 1, the device enters the XNOR
tree test mode. Clearing the bit removes the device from
the XNOR tree test mode.
Unused. Do not write to these bits.
0x00
1.  This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 74. REMOTE 1 TEMPERATURE OFFSET (Note 1)
Register Address
R/W
Description
Power-On Default
0x70
R/W
Remote 1 temperature offset.
0x00
[7:0]
R/W
Allows a temperature offset to be automatically applied
to the Remote Temperature 1 channel measurement.
Bit 1 of Configuration Register 5 (0x7C) determines the
range and resolution of this register.
1.  This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 75. LOCAL TEMPERATURE OFFSET (Note 1)
Register Address
R/W
Description
Power-On Default
0x71
R/W
Local temperature offset.
0x00
[7:0]
R/W
Allows a temperature offset to be automatically applied to
the local temperature measurement. Bit 1 of Configuration
Register 5 (0x7C) determines the range and resolution of
this register.
1.  This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
Table 76. REMOTE 2 TEMPERATURE OFFSET (Note 1)
Register Address
R/W
Description
Power-On Default
0x72
R/W
Remote 2 temperature offset.
0x00
[7:0]
R/W
Allows a temperature offset to be automatically applied
to the Remote Temperature 2 channel measurement.
Bit 1 of Configuration Register 5 (0x7C) determines the
range and resolution of this register.
1.  This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register have no effect.
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